View MAX8713_2021875.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

general description the MAX8713 multichemistry battery charger simplifies construction of smart chargers with a minimum number of external components. it uses the intel system management bus (smbus) to control the charge volt- age and charge current. high efficiency is achieved through the use of a constant off-time step-down topol- ogy with synchronous rectification. the MAX8713 charges one to four lithium-ion (li+) cells in series and delivers over 2a charge current?calable with the sense resistor. the MAX8713 drives n-channel mosfets for improved efficiency and reduced cost. a low-offset charge-current-sense amplifier provides high- accuracy charge current with small sense resistors. the MAX8713 is available in a space-saving 24-pin 4mm x 4mm thin qfn package and operates over the extended (-40 c to +85 c) temperature range. an eval- uation kit is available to reduce design time. applications handset car kits digital cameras pdas and tablet computers notebook computers portable equipment with rechargeable batteries features ? over 2a charge current ? intel smbus 2-wire serial interface ? 0.6% charge voltage accuracy ? 11-bit charge voltage resolution ? 6-bit charge current resolution ? adjustable switching frequency ? +8v to +28v input voltage range ? cycle-by-cycle current limit ? charges any battery chemistry (li+, nicd, nimh, lead acid, etc.) ? small 24-pin tqfn MAX8713 simplified multichemistry smbus battery charger ________________________________________________________________ maxim integrated products 1 19-3498; rev 0; 11/04 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available ordering information part temp range pin-package MAX8713etg -40 c to +85 c 24 thin qfn 4mm x 4mm ref 1 ic1 2 cci 3 ccv 4 dac 5 v dd 6 dlov 18 dlo 17 pgnd 16 csip 15 ic3 14 csin 13 sda 7 scl 8 ic2 9 freq 10 gnd 11 batt 12 dcin 24 ldo 23 dcsns 22 bst 21 dhi 20 lx 19 MAX8713 *exposed paddle thin qfn (4mm x 4mm) pin configuration smbus is a trademark of intel corp. MAX8713 dcin dhi csip csin batt dlov ldo pgnd external load n n gnd ref cci ccv dlo bst lx dac v dd scl sda freq battery dcsns host v dd scl sda optional t ypical operating circuit
MAX8713 simplified multichemistry smbus battery charger 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dcsns , v dcin to gnd ..........................................-0.3v to +30v v bst to gnd ..........................................................-0.3v to +36v v bst to lx ................................................................-0.3v to +6v v dhi to lx..................................................-0.3v to (v bst + 0.3v) v lx to gnd................................................................-6v to +30v v dhi to gnd ..............................................................-6v to +36v v batt , v csin to gnd .............................................-0.3v to +20v v csip to v csin .......................................................-0.3v to +0.3v pgnd to gnd .......................................................-0.3v to +0.3v v cci , v ccv , v dac , v ref to gnd ..............-0.3v to (v ldo + 0.3v) v dlov , v ldo , v dd , v scl , v sda , v freq to gnd ......-0.3v to +6v v dlo to pgnd ........................................-0.3v to (v dlov + 0.3v) ldo short-circuit current...................................................25ma continuous power dissipation (t a = +70?) 24-pin thin qfn 4mm x 4mm (derate 20.8mw/? above +70 c).............................................................1667mw operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? electrical characteristics (v dcin = v dcsns = 12v, v batt = v csip = v csin = v bst = v lx = 8.4v, gnd = pgnd = 0, ldo = dlov, c ref = c ldo = c dlov = 1?, c dac = 0.1? , v dd = 3.3v. pins cci and ccv are compensated per figure 1. t a = 0c to +85c , unless otherwise noted. typical values are at t a = +25?.) parameter conditions min typ max units charge voltage regulation chargingvoltage() = 0x20d0 -0.6 +0.6 chargingvoltage() = 0x1060 -1.0 +1.0 battery regulation voltage accuracy chargingvoltage() = 0x41a0 and 0x3130 -0.8 +0.8 % chargingvoltage() = 0x41a0, v dcin = 19v 16.668 16.8 16.934 chargingvoltage() = 0x3130, v dcin = 19v 12.491 12.592 12.693 chargingvoltage() = 0x20d0, v dcin = 12v 8.439 8.4 8.442 battery full charge voltage chargingvoltage() = 0x1060, v dcin = 12v 4.150 4.192 4.234 v charge current regulation csip to csin full-scale current-sense voltage v batt = 8.4v, v dcin = 12v 78.22 80.64 88.05 mv chargingcurrent() = 0x07e0 -3 +3 compliance current accuracy chargingcurrent() = 0x03e0 -5 +5 % chargingcurrent() = 0x07e0 78.22 80.64 83.05 chargingcurrent() = 0x03e0 37.68 39.68 41.68 chargingcurrent() = 0x0180 13.82 15.36 16.88 battery charge current-sense voltage chargingcurrent() = 0x0020 1.28 mv batt/csip/csin input voltage range 0 19 v v dcin = 0 or charger not switching 0.1 1 ? csip/csin input current v csip = v csin = 19v 700 ? supply and linear regulator dcin input voltage range 7.5 28.0 v dcsns input voltage range 7.5 28.0 v
MAX8713 simplified multichemistry smbus battery charger _______________________________________________________________________________________ 3 electrical characteristics (continued) (v dcin = v dcsns = 12v, v batt = v csip = v csin = v bst = v lx = 8.4v, gnd = pgnd = 0, ldo = dlov, c ref = c ldo = c dlov = 1?, c dac = 0.1? , v dd = 3.3v. pins cci and ccv are compensated per figure 1. t a = 0c to +85c , unless otherwise noted. typical values are at t a = +25?.) parameter conditions min typ max units dcin falling 6.5 7 dcin undervoltage-lockout trip point dcin rising 7 7.5 v dcin quiescent current 7.5v < v dcin < 28v 2.7 6 ma dcsns quiescent current 7.5v < v dcsns < 28v 200 300 ? v batt = 19v, v dcin = 0 or charger not switching 0.1 1 batt input current v batt = 2v to 19v, v dcin > v batt + 0.3v 200 500 ? ldo output voltage 7.5v < v dcin < 28v, no load 5.25 5.4 5.55 v ldo load regulation 0 < i ldo < 5ma 34 100 mv ldo undervoltage-lockout trip point v dcin = 7.5v 3.20 4 5.15 v vdd range 2.7 5.5 v vdd uvlo rising 2.5 2.7 v vdd uvlo hysteresis 100 mv vdd quiescent current v dcin < 6v, v dd = 5.5v, v scl = v sda = 5.5v 27 ? reference ref output voltage 0 < i ref < 500? 4.067 4.096 4.125 v ref undervoltage-lockout trip point ref falling 3.1 3.9 v trip points batt power_fail threshold v dcsns falling 50 100 150 mv batt power_fail threshold hysteresis 50 200 400 mv switching regulator r freq = 100k ? 675 750 825 v batt = 8.4v r freq = 400k ? 2700 3000 3300 r freq = 100k ? 370 410 450 off-time v bst - v lx = 4.5v v batt = 11v r freq = 400k ? 1476 1640 1804 ns dlov supply current charger not switching 5 10 ? bst supply current dhi high 6 15 ? bst input quiescent current v dcin = 0v, v bst = 23.5v, v batt = v lx = 19v 0.3 1 ? lx input bias current v dcin = 28v, v batt = v lx = 19v 150 500 ? maximum discontinuous-mode peak current 0.125 a dhi on-resistance high v bst =12.9v, v batt = 8.4v, v dcsns = 12, dhi = v lx ; i dhi = -10ma 7 14 ? dhi on-resistance low v bst =12.9v, v batt = 8.4v, v csns = 12, dhi = v bst ; i dhi = +100ma 2 4 ? dlo on-resistance high v dlov = 4.5v, i dlo = -10ma 7 14 ? dlo on-resistance low v dlov = 4.5v, i dlo = +100ma 2 4 ? error amplifiers gmv amplifier transconductance chargingvoltage() = 0x20d0, v batt = 8.400v 0.0625 0.125 0.2500 ma/v
MAX8713 simplified multichemistry smbus battery charger 4 _______________________________________________________________________________________ timing characteristics (v dcin = v dcsns = 12v, v batt = v csip = v csin = v bst = v lx = 8.4v, gnd = pgnd = 0, ldo = dlov, c ref = c ldo = c dlov = 1?, c dac = 0.1? , v dd = 3.3v. pins cci and ccv are compensated per figure 1. t a = 0c to +85c , unless otherwise noted. typical values are at t a = +25?.) parameter sym b o l conditions min typ max units smbus timing specification (v dd = 2.7v to 5.5v) (figures 6 and 7) smbus frequency f smb 10 100 khz bus free time t buf 4.7 ? start condition hold time from scl t hd:sta 4 ? start condition setup time from scl t su:sta 4.7 ? stop condition setup time from scl t su:sto 4 ? sda hold time from scl t hd:dat 300 ns sda setup time from scl t su:dat 250 ns scl low timeout t timeout (note 1) 25 35 ms scl low period t low 4.7 ? scl high period t high 4 ? cumulative clock low extend time t low:sext (note 2) 25 ms electrical characteristics (continued) (v dcin = v dcsns = 12v, v batt = v csip = v csin = v bst = v lx = 8.4v, gnd = pgnd = 0, ldo = dlov, c ref = c ldo = c dlov = 1?, c dac = 0.1? , v dd = 3.3v. pins cci and ccv are compensated per figure 1. t a = 0c to +85c , unless otherwise noted. typical values are at t a = +25?.) parameter conditions min typ max units gmi amplifier transconductance chargingcurrent() = 0x03e0, v csip - v csin = 39.68mv 0.5 1 2.0 ma/v cci/ccv clamp voltage 0.25v < v ccv/i < 2.0v 150 300 600 mv smbus interface level specifications sda/scl input low voltage v dd = 2.7v to 5.5v 0.8 v sda/scl input high voltage v dd = 2.7v to 5.5v 2.1 v sda/scl input bias current v dd = 2.7v to 5.5v -1 +1 ? sda, output sink current v (sda) = 0.4v 6 ma
MAX8713 simplified multichemistry smbus battery charger _______________________________________________________________________________________ 5 electrical characteristics (v dcin = v dcsns = 12v, v batt = v csip = v csin = v bst = v lx = 8.4v, gnd = pgnd = 0, ldo = dlov, c ref = c ldo = c dlov = 1?, c dac = 0.1? , v dd = 3.3v. pins cci and ccv are compensated per figure 1. t a = -40c to +85c , unless otherwise noted.) (note 3) parameter conditions min typ max units charge voltage regulation chargingvoltage() = 0x20d0 -1.0 +1.0 chargingvoltage() = 0x1060 -1.5 +1.5 battery regulation voltage accuracy chargingvoltage() = 0x41a0 and 0x3130 -1.2 +1.2 % chargingvoltage() = 0x41a0, v dcin = 19v 16.598 17.002 chargingvoltage() = 0x3130, v dcin = 19v 12.441 12.743 chargingvoltage() = 0x20d0, v dcin = 12v 8.312 8.484 battery full charge voltage chargingvoltage() = 0x1060, v dcin = 12v 4.124 4.253 v charge current regulation csip to csin full-scale current-sense voltage v batt = 8.4v, v dcin = 12v 78.22 83.05 mv chargingcurrent() = 0x07e0 -3 +3 compliance current accuracy chargingcurrent() = 0x03e0 -5 +5 % chargingcurrent() = 0x07e0 78.22 83.05 chargingcurrent() = 0x03e0 37.68 41.68 battery charge current-sense voltage chargingcurrent() = 0x0180 13.056 17.664 mv batt/csip/csin input voltage range 0 19 v v dcin = 0 or charger not switching 1 ? csip/csin input current v csip = v csin = 19v 700 ? supply and linear regulator dcin input voltage range 7.5 28.0 v dcsns input voltage range 7.5 28.0 v dcin falling 6.5 dcin undervoltage-lockout trip point dcin rising 7.5 v dcin quiescent current 7.5v < v dcin < 28v 6 ma dcsns quiescent current 7.5v < v dcsns < 28v 300 ? v batt = 19v, v dcin = 0 or charger not switching 1 batt input current v batt = 2v to 19v, v dcin > v batt + 0.3v 500 ? ldo output voltage 7.5v < v dcin < 28v, no load 5.25 5.55 v ldo load regulation 0 < i ldo < 5ma 100 mv ldo undervoltage-lockout trip point v dcin = 7.5v 3.20 5.15 v vdd range 2.7 5.5 v vdd uvlo rising 2.7 v vdd quiescent current v dcin < 6v, v dd = 5.5v, v scl = v sda = 5.5v 27 ? reference ref output voltage 0 < i ref < 500? 4.053 4.133 v ref undervoltage-lockout trip point ref falling 3.9 v
MAX8713 simplified multichemistry smbus battery charger 6 _______________________________________________________________________________________ electrical characteristics (continued) (v dcin = v dcsns = 12v, v batt = v csip = v csin = v bst = v lx = 8.4v, gnd = pgnd = 0, ldo = dlov, c ref = c ldo = c dlov = 1?, c dac = 0.1? , v dd = 3.3v. pins cci and ccv are compensated per figure 1. t a = -40c to +85c , unless otherwise noted.) (note 3) parameter conditions min typ max units trip points batt power_fail threshold v dcsns falling 50 150 mv batt power_fail threshold hysteresis 50 400 mv switching regulator r freq = 100k ? 637 862 v batt = 8.4v r freq = 400k ? 2550 3450 r freq = 100k ? 350 470 off-time v bst - v lx = 4.5v v batt = 11v r freq = 400k ? 1394 1866 ns dlov supply current charger not switching 10 ? bst supply current dhi high 15 ? bst input quiescent current v dcin = 0v, v bst = 23.5v, v batt = v lx = 19v 1 ? lx input bias current v dcin = 28v, v batt = v lx = 19v 500 ? dhi on-resistance high v bst =12.9v, v batt = 8.4v, v dcsns = 12, dhi= v lx ; i dhi = -10ma 14 ? dhi on-resistance low v bst =12.9v, v batt = 8.4v, v csns = 12, dhi = v bst ; i dhi = +100ma 4 ? dlo on-resistance high v dlov = 4.5v, i dlo = -10ma 14 ? dlo on-resistance low v dlov = 4.5v, i dlo = +100ma 4 ? error amplifiers gmv amplifier transconductance chargingvoltage() = 0x20d0, v batt = 8.384v 0.0625 0.2500 ma/v gmi amplifier transconductance chargingcurrent() = 0x03e0, v csip - v csin = 39.68mv 0.5 2.0 ma/v cci/ccv clamp voltage 0.25v < v ccv/i < 2.0v 130 600 mv smbus interface level specifications sda/scl input low voltage v dd = 2.7v to 5.5v 0.8 v sda/scl input high voltage v dd = 2.7v to 5.5v 2.2 v sda/scl input bias current v dd = 2.7v to 5.5v -1 +1 ? sda, output sink current v (sda) = 0.4v 6 ma
MAX8713 simplified multichemistry smbus battery charger _______________________________________________________________________________________ 7 timing characteristics (v dcin = v dcsns = 12v, v batt = v csip = v csin = v bst = v lx = 8.4v, gnd = pgnd = 0, ldo = dlov, c ref = c ldo = c dlov = 1?, c dac = 0.1? , v dd = 3.3v. pins cci and ccv are compensated per figure 1. t a = -40c to +85c , unless otherwise noted.) (note 3) parameter sym b o l conditions min typ max units smbus timing specification (v dd = 2.7v to 5.5v) (figures 6 and 7) smbus frequency f smb 10 100 khz bus free time t buf 4.7 ? start condition hold time from scl t hd:sta 4 ? start condition setup time from scl t su:sta 4.7 ? stop condition setup time from scl t su:sto 4 ? sda hold time from scl t hd:dat 300 ns sda setup time from scl t su:dat 250 ns scl low timeout t timeout (note 1) 25 35 ms scl low period t low 4.7 ? scl high period t high 4 ? cumulative clock low extend time t low:sext (note 2) 25 ms note 1: devices participating in a transfer timeout when any clock low exceeds the t timeout:min value of 25ms. devices that have detected a timeout condition must reset the communication no later than t timeout:max of 35ms. the maximum value speci- fied must be adhered to by both a master and a slave as it incorporates the cumulative stretch limit for both a master (10ms) and a slave (25ms). note 2: t low:sext is the cumulative time a slave device is allowed to extend the clock cycles in one message from the initial start to the stop. if a slave device exceeds this time, it is expected to release both its clock and data lines and reset itself. note 3: specifications to -40 c are guaranteed by design and not production tested. ldo load regulation MAX8713 toc01 i ldo (ma) v ldo (v) 45 40 35 30 25 20 15 10 5 5.32 5.34 5.36 5.38 5.40 5.42 5.44 5.30 050 charger not switching ldo line regulation MAX8713 toc02 input voltage (v) v ldo (v) 26 24 20 22 12 14 16 18 10 5.320 5.325 5.330 3.335 3.340 3.345 5.350 5.355 5.360 5.315 828 charger switching reference load regulation MAX8713 toc03 i ref ( a) v ref (v) 900 800 700 600 500 400 300 200 100 4.0955 4.0960 4.0965 4.0970 4.0975 4.0980 4.0950 0 1000 __________________________________________typical operating characteristics (v dcin = v dcsns = 20v, circuit of figure 1, t a = +25?, unless otherwise noted.)
MAX8713 simplified multichemistry smbus battery charger 8 _______________________________________________________________________________________ reference voltage vs. temperature MAX8713 toc04 temperature ( c) reference voltage (v) 80 60 20 40 0 -20 4.082 4.084 4.086 4.088 4.090 4.092 4.094 4.096 4.098 4.100 4.080 -40 efficiency vs. charge current MAX8713 toc05 charge current (a) efficiency (%) 1.8 1.6 1.2 1.4 0.4 0.6 0.8 1.0 0.2 10 20 30 40 50 60 70 80 90 100 0 0 2.0 v batt = 16.8v v batt = 12.6v v batt = 8.4v v batt = 4.2v frequency vs. r freq MAX8713 toc06 r freq (k ? ) frequency (khz) 400 300 200 100 100 200 300 400 500 600 700 0 0500 frequency vs. v in MAX8713 toc07 input voltage (v) frequency (khz) 26 24 20 22 12 14 16 18 10 50 100 150 200 250 300 350 400 450 0 828 v batt = 4.2v v batt = 8.4v v batt = 12.6v v batt = 16.8v adapter current vs. adapter voltage MAX8713 toc10 adapter voltage (v) adapter current (ma) 20 15 10 5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 025 charger switching, no load charger not switching charge-current error vs. battery voltage MAX8713 toc08 v batt (v) charge-current error (%) 18 16 12 14 6 8 10 4 -8 -6 -4 -2 0 2 4 6 8 10 -10 220 chargecurrent() = 0.992a chargecurrent() = 2a charge-current error vs. charge-current setting MAX8713 toc09 charge-current setting (a) charge-current error (%) 2.0 1.5 1.0 0.5 -4 -3 -2 -1 0 1 2 3 4 5 -5 02.5 battery current vs. battery voltage MAX8713 toc11 battery voltage (v) battery current ( a) 18 16 14 12 10 8 6 4 2 1 2 3 4 5 6 0 020 adapter absent adapter present ____________________________typical operating characteristics (continued) (v dcin = v dcsns = 20v, circuit of figure 1, t a = +25?, unless otherwise noted.)
MAX8713 simplified multichemistry smbus battery charger _______________________________________________________________________________________ 9 battery-voltage error vs. charge voltage setting MAX8713 toc12 charge voltage setting (v) battery-voltage error (mv) 15 10 5 -80 -60 -40 -20 0 20 -100 020 battery-voltage error vs. load MAX8713 toc13 load current (a) battery-voltage error (mv) 1.5 1.0 0.5 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 -50 0 2.0 ____________________________typical operating characteristics (continued) (v dcin = v dcsns = 20v, circuit of figure 1, t a = +25?, unless otherwise noted.) pin name function 1 ref 4.096v voltage reference. bypass ref with a 1? capacitor to gnd. 2i c1 internally connected. connect to the exposed paddle for improved layout. 3 cci output current-regulation loop compensation point. connect 0.01? to gnd. 4 ccv voltage-regulation loop compensation point. connect 10k ? in series with 0.01? to gnd. 5 dac dac voltage output. bypass with a 0.1? capacitor to gnd. 6v dd logic circuitry supply voltage input. bypass with a 0.1? capacitor to gnd. 7 sda smbus data io. open-drain output. connect the external pullup resistor according to smbus specifications. 8 scl smbus clock input. connect the external pullup resistor according to smbus specifications. 9i c2 internally connected. connect to the exposed paddle for improved layout. 10 freq t off frequency adjust input. connect a 100k ? to 400k ? resistor between freq and gnd to set the pwm frequency. 11 gnd analog ground 12 batt battery voltage sense input 13 csin output current-sense negative input 14 ic3 internally connected. connect to the exposed paddle for improved layout. 15 csip output current-sense positive input. connect a current-sense resistor from csip to csin. 16 pgnd power ground 17 dlo low-side power mosfet driver output. connect to the low-side n-channel mosfet gate. 18 dlov low-side driver supply. bypass dlov with a 1? capacitor to pgnd. connect a 33 ? resistor from ldo to dlov for filtering. pin description
MAX8713 simplified multichemistry smbus battery charger 10 ______________________________________________________________________________________ pin name function 19 lx high-side power mosfet driver power-supply connection. connect a 0.1? capacitor from bst to lx. 20 dhi high-side power mosfet driver output. connect to the high-side n-channel mosfet gate. 21 bst high-side power mosfet driver power-supply connection. connect a 0.1? capacitor from bst to lx. 22 dcsns dc supply-voltage sense input. charging is disabled for v dcsns < v csin + 100mv. dcsns is also used to calculate the switching regulator? off-time. 23 ldo device power supply. ldo is the output of the 5.4v linear regulator supplied from dcin. bypass ldo with a 1? ceramic capacitor from ldo to gnd. 24 dcin charger bias supply input. bypass dcin with a 0.1? ceramic capacitor to pgnd. pin description (continued) figure 1. typical application circuit MAX8713 dcin dhi csip csin batt dlov ldo pgnd 24 23 external load rs 40m ? l1 22 h c12 1 f c11 1 f m2 m1 gnd 22 ref 1 cci c8 0.01 f 3 ccv 4 r5 10k ? c9 0.01 f r6 33 ? c1 0.1 f c3 1 f c7 0.1 f dlo c2 22 f c5 10 f bst lx d3 dac 2 c4 0.1 f vdd 6 scl 8 sda 7 freq 10 r3 100k ? battery 11 18 12 13 15 16 17 19 20 21 dcsns d1 d2 batt+ battery batt- scl sda host v dd scl sda c6 0.1 f adapter
detailed description the MAX8713 includes all of the functions necessary to charge li+, nimh, and nicd smart batteries. a high- efficiency, synchronous-rectified, step-down dc-dc converter is used to implement a precision constant- current, constant-voltage charger. the dc-dc convert- er drives a high-side n-channel mosfet and provides synchronous rectification with a low-side n-channel mosfet. the charge current-sense amplifier has a low input offset error, allowing the use of small-valued sense resistors. the MAX8713 features a voltage-regu- lation loop (ccv) and a current-regulation loop (cci). cci and ccv operate independently of each other. the ccv voltage-regulation loop monitors batt to ensure that its voltage never exceeds the voltage set by the chargevoltage() command. the cci battery current- regulation loop monitors current delivered to batt to ensure that it never exceeds the current limit set by the chargecurrent() command. the charge current-regula- tion loop is in control as long as the batt voltage is below the set point. when the batt voltage reaches its set point, the voltage-regulation loop takes control and maintains the battery voltage at the set point. MAX8713 simplified multichemistry smbus battery charger ______________________________________________________________________________________ 11 figure 2. functional diagram MAX8713 gmv batt ccv lowest voltage clamp dc-dc converter smbus logic dhi dlo pgnd dlov lx bst level shift low- side driver high- side driver gnd 6-bit dac scl sda 5.4v linear regulator 4.096v reference 11-bit dac a = 20v/v csip csin gmi cci csi current- sense amplifier ccmp 0.1v imin imax 150mv (188ma for 40m ? ) izx 2v (2.5a for 40m ? ) off-time generator ref ldo dcin dcsns freq chargingvoltage() chargingvoltage() dac lvc
MAX8713 the circuit shown in figure 1 demonstrates a typical application for smart-battery systems. a functional dia- gram is shown in figure 2. setting charge voltage to set the output voltage of the MAX8713, use the smbus to write a 16-bit chargevoltage() command. this 16-bit command translates to a 1mv lsb and a 65.535v full-scale voltage. the MAX8713 ignores the first 4 lsbs and uses the next 11 bits to set the voltage dac. the charge voltage range of the MAX8713 is 0 to 19.200v. all codes requesting charge voltage greater than 19.200v result in a voltage setting of 19.200v. all codes requesting charge voltage below 1.024v result in a voltage set point of zero, which terminates charging. upon reset, the chargevoltage() and chargecurrent() values are cleared and the charger remains shut down until a chargevoltage() and chargecurrent() command is sent. the chargevoltage() command uses the write-word protocol (figure 5). the command code for chargevoltage() is 0x15 (0b00010101). the 16-bit binary number formed by d15?0 represents the charge-voltage set point in mv. however, the resolution of the MAX8713 is 16mv in setting the charge voltage because the d0?3 bits are ignored as shown in table 1. the d15 bit is also ignored because it is not needed to span the 0 to 19.2v range. figure 3 shows the map- ping between the charge-voltage set point and the chargevoltage() code. all codes requesting charge voltage greater than 19.200v result in a 19.200v set- ting. all codes requesting charge voltage below 1024mv result in a voltage set point of zero, which ter- minates charging. upon initial power-up, chargingvoltage() is reset to zero and a chargingvoltage() command must be sent to initiate charging. setting charge current to set the charge current for the MAX8713, use the smbus interface to write a 16-bit chargecurrent() com- mand. this 16-bit command translates to a 1ma per lsb and a 65.535a full-scale current using a 40m ? current-sense resistor (rs in figure 1). equivalently, the chargecurrent() value sets the voltage across the csip and csin inputs in 40? increments. the MAX8713 ignores the lowest 5 lsbs and uses the next 6 bits to set the current dac. the charge current range is 0 to 2.016a using a 40m ? current-sense resistor. all codes requesting charge current above 2.016a result in a set- ting of 2.016a. for larger current settings, scale down the sense resistor. all codes requesting charge current between 1ma to 32ma result in a current setting of 32ma. to stop charging, set chargecurrent() to 0. upon initial power-up, the chargevoltage() and chargecurrent() values are cleared and the charger remains shut down. to start the charger, send valid chargevoltage() and chargecurrent() commands. the chargecurrent() command uses the write-word protocol (figure 5). the command code for chargecurrent() is 0x14 (0b00010100). table 2 shows the format of the chargecurrent() register. figure 4 shows the mapping between the charge-current set point and the chargecurrent() code. the default charge current setting at power-up is 0ma. ldo regulator an integrated low-dropout (ldo) linear regulator pro- vides a 5.4v supply derived from dcin, and delivers over 5ma of load current. the ldo powers the gate dri- vers of the n-channel mosfets in the dc-dc converter. see the mosfet drivers section. the ldo also biases the 4.096v reference and most of the control circuitry. bypass ldo to gnd with a 1? ceramic capacitor. v dd supply the v dd input provides power to the smbus interface. connect v dd to ldo, or apply an external supply to v dd to keep the smbus interface active while the sup- ply to dcin is removed. when v dd is biased, the inter- nal registers are maintained. bypass v dd to gnd with a 0.1? ceramic capacitor. operating conditions table 3 is a summary of operating states of the MAX8713. ? adapter present. when dcin is greater than 7.5v, the adapter is considered to be present. in this con- dition, both the ldo and ref function properly and battery charging is allowed. ? power fail. when dcin is less than batt + 0.3v, the MAX8713 is in the power-fail state, since the dc-dc converter is in dropout. the charger will not attempt to charge when in the power-fail state. ?v dd undervoltage. when v dd is less than 2.5v, the v dd supply is considered to be in an undervolt- age state. the smbus interface does not respond to commands. when coming out of the undervoltage condition, the part is in its power-on reset state. no charging occurs when v dd is in the undervoltage state. when v dd is greater than 2.5v, smbus regis- ters are preserved. simplified multichemistry smbus battery charger 12 ______________________________________________________________________________________
smbus interface the MAX8713 receives control inputs from the smbus interface. the serial interface complies with the smbus protocols as documented in the system management bus specification v1.1, which can be downloaded from www.smbus.org. the MAX8713 uses the smbus read- word and write-word protocols (figure 5) to communi- cate with the smart battery. the MAX8713 is an smbus slave device and does not initiate communication on the bus. it responds to the 7-bit address 0b0001001_ (0x12). in addition, the MAX8713 has two identification (id) registers: a 16-bit device id register and a 16-bit manufacturer id register. the data (sda) and clock (scl) pins have schmitt-trig- ger inputs that can accommodate slow edges. choose pullup resistors for sda and scl to achieve rise times according to the smbus specifications. communication starts when the master signals a start condition, which is a high-to-low transition on sda, while scl is high. when the master has finished com- municating, the master issues a stop condition, which is a low-to-high transition on sda, while scl is high. MAX8713 simplified multichemistry smbus battery charger ______________________________________________________________________________________ 13 table 1. chargevoltage() bit bit name description 0 not used. normally a 1mv weight. 1 not used. normally a 2mv weight. 2 not used. normally a 4mv weight. 3 not used. normally an 8mv weight. 4 charge voltage, dacv 0 0 = adds 0mv of charge-voltage compliance, 1024mv (min). 1 = adds 16mv of charge-voltage compliance. 5 charge voltage, dacv 1 0 = adds 0mv of charge-voltage compliance, 1024mv (min). 1 = adds 32mv of charge-voltage compliance. 6 charge voltage, dacv 2 0 = adds 0mv of charge-voltage compliance, 1024mv (min). 1 = adds 64mv of charge-voltage compliance. 7 charge voltage, dacv 3 0 = adds 0mv of charge-voltage compliance, 1024mv (min). 1 = adds 128mv of charge-voltage compliance. 8 charge voltage, dacv 4 0 = adds 0mv of charge-voltage compliance, 1024mv (min). 1 = adds 256mv of charge-voltage compliance. 9 charge voltage, dacv 5 0 = adds 0mv of charge-voltage compliance, 1024mv (min). 1 = adds 512mv of charge-voltage compliance. 10 charge voltage, dacv 6 0 = adds 0mv of charge-voltage compliance. 1 = adds 1024mv of charge-voltage compliance. 11 charge voltage, dacv 7 0 = adds 0mv of charge-voltage compliance. 1 = adds 2048mv of charge-voltage compliance. 12 charge voltage, dacv 8 0 = adds 0mv of charge-voltage compliance. 1 = adds 4096mv of charge-voltage compliance. 13 charge voltage, dacv 9 0 = adds 0mv of charge-voltage compliance. 1 = adds 8192mv of charge-voltage compliance. 14 charge voltage, dacv 10 0 = adds 0mv of charge-voltage compliance. 1 = adds 16,384mv of charge-voltage compliance, 19,200mv (max). 15 not used. normally a 32,768mv weight. command: 0x15
MAX8713 table 2. chargecurrent() bit bit name description 0 not used. normally a 1ma weight. 1 not used. normally a 2ma weight. 2 not used. normally a 4ma weight. 3 not used. normally an 8ma weight. 4 not used. normally a 16ma weight. 5 charge current dac, bit 0 0 = adds 0ma of charger current compliance. 1 = adds 32ma of charger current compliance. 6 charge current dac, bit 1 0 = adds 0ma of charger current compliance. 1 = adds 64ma of charger current compliance. 7 charge current dac, bit 2 0 = adds 0ma of charger current compliance. 1 = adds 128ma of charger current compliance. 8 charge current dac, bit 3 0 = adds 0ma of charger current compliance. 1 = adds 256ma of charger current compliance. 9 charge current dac, bit 4 0 = adds 0ma of charger current compliance. 1 = adds 512ma of charger current compliance. 10 charge current dac, bit 5 0 = adds 0ma of charger current compliance. 1 = adds 1024ma of charger current compliance. 2016ma (max). 11 not used. normally a 2048ma weight. 12 not used. normally a 4096ma weight. 13 not used. normally a 8192ma weight. 14 not used. normally a 16,384ma weight. 15 not used. normally a 32,768ma weight. command: 0x14 the bus is then free for another transmission. figures 6 and 7 show the timing diagram for signals on the smbus interface. the address-byte, command-byte, and data-bytes are transmitted between the start and stop conditions. the sda state is allowed to change only while scl is low, except for the start and stop conditions. data is transmitted in 8-bit bytes and is sampled on the rising edge of scl. nine clock cycles are required to transfer each byte in or out of the MAX8713 because either the master or the slave acknowledges the receipt of the correct byte during the ninth clock. the MAX8713 supports the charger com- mands as described in tables 2?. battery charger commands the MAX8713 supports four battery-charger com- mands that use either write-word or read-word proto- cols, as summarized in table 2. manufacturerid() and deviceid() can be used to identify the MAX8713. on the MAX8713, manufacturerid() always returns 0x004d and deviceid() always returns 0x0007. dc-dc converter the MAX8713 employs a pseudo-fixed-frequency, cur- rent-mode control scheme with cycle-by-cycle current limit. the controller? constant off-time (t off ) is calculat- ed based on v dcin , v batt , and r freq , and has a min- imum value of 300ns. the operation of the dc-dc controller is determined by the following four compara- tors as shown in the functional diagram (figure 2): simplified multichemistry smbus battery charger 14 ______________________________________________________________________________________
the imin comparator sets the peak inductor current in discontinuous mode. imin compares the control signal (lvc) against 100mv (typ). when lvc voltage is less than 100mv, dhi and dlo are both low. the ccmp comparator is used for current-mode regu- lation in continuous-conduction mode. ccmp com- pares lvc against the charging-current feedback signal (csi). the comparator output is high and the high-side mosfet on-time is terminated when the csi voltage is higher than lvc. the imax comparator provides a cycle-by-cycle cur- rent limit. imax compares csi to 2v (corresponding to 2.5a when rs = 40m ? ). the comparator output is high and the high-side mosfet on-time is terminated when the current-sense signal exceeds 2.5a. a new cycle cannot start until the imax comparator output goes low. the zcmp comparator provides zero-crossing detec- tion during discontinuous conduction. zcmp compares the current-sense feedback signal to 188ma (rs = 40m ? ). when the inductor current is lower than the 188ma threshold, the comparator output is high and dlo is turned off. setting the switching frequency the MAX8713 features an adjustable switching fre- quency. to set the switching frequency, choose r freq according to the following equation: higher switching frequencies are typically preferred to minimize inductor and capacitor requirements. see the typical operating characteristics . the switching fre- quency has a minor dependence on v dcin and v batt because of voltage losses along the high current path and other 2nd-order effects not accounted in the MAX8713? off-time calculation. these can be account- ed for by observing the curves in the typical operating characteristics . r freq switch 100khz 400k f = ? MAX8713 simplified multichemistry smbus battery charger ______________________________________________________________________________________ 15 1024 4200 8400 19200 16800 0xffff 0x0400 0x1060 0x20d0 0x4b00 0x41a0 chargevoltage() code charge-voltage set point (mv) figure 3. chargevoltage() code to charge-voltage set-point mapping 32 512 1024 2016 0xffff 0x0020 0x0200 0x0400 0x07e0 chargecurrent() code charge-current set point (ma) figure 4. chargecurrent() code to charge-current set point mapping (r 2 = 40m ? ) table 3. summary of operating states operating states input conditions adapter present power fail v dd undervoltage dcin v dcin > 7.5v v dcin < v batt + 0.1v x batt xv batt > v dcin - 0.1v x v dd xxv dd < 2.5v x = don? care.
MAX8713 ccv, cci, and lvc control blocks the MAX8713 controls charge current (cci control loop) or charge voltage (ccv control loop), depending on the operating condition. the two control loops ccv and cci are brought together internally at the lvc (low- est voltage clamp) amplifier. the output of the lvc amplifier is the feedback control signal for the dc-dc controller. the minimum voltage of ccv and cci appears at the output of the lvc amplifier and clamps the remaining control loop to within 0.3v above the con- trol point. clamping the other control loop close to the lowest control loop ensures fast transition with minimal overshoot when switching between different regulation modes (see the compensation section). continuous-conduction mode with sufficient charge current, the MAX8713? inductor current never crosses zero, which is defined as continu- ous-conduction mode. the regulator switches at 400khz (r freq = 100k ? ) if it is not in dropout (v batt < 0.88 v dcin ). the controller starts a new cycle by turn- ing on the high-side mosfet and turning off the low- side mosfet. when the charge-current feedback signal (csi) is greater than the control point (lvc), the ccmp comparator output goes high and the controller initiates the off-time by turning off the high-side mosfet and turning on the low-side mosfet. the operating fre- quency is governed by the off-time and is dependent upon v dcin, v batt , and r freq . see the setting the switching frequency section for more information. at the end of the fixed off-time, the controller initiates a new cycle if the control point (lvc) is greater than 100mv, and the peak charge current is less than the cycle-by-cycle current limit. restated another way, imin must be high and imax must be low for the controller to initiate a new cycle. if the peak inductor current exceeds the imax comparator threshold, then the on-time is ter- minated. the cycle-by-cycle current limit effectively pro- tects against overcurrent and short-circuit faults. there is a 0.3? minimum off-time when the (v dcsns - v batt ) differential becomes too small. if v batt 0.88 x v dcsns , then the threshold for minimum off-time is reached and the off-time is fixed at 0.3?. the switch- ing frequency in this mode varies according to the equation: f = v-v 0.3 s v in out in simplified multichemistry smbus battery charger 16 ___________________________________________________________________________________________________ figure 5. smbus write-word and read-word protocols s a) write-word format w ack ack ack p command byte low data byte high data byte slave address ack 7 bits 8 bits 1b msb lsb msb lsb 8 bits msb lsb 8 bits msb lsb 0 1b 0 1b 0 1b 0 1b 0 preset to 0b0001001 chargingcurrent() = 0x14 chargervoltage() = 0x15 d7 d0 d15 d8 s b) read-word format w ack ack nack p command byte low data byte high data byte slave address s ack 7 bits 8 bits 1b msb lsb slave address 7 bits msb lsb msb lsb 8 bits msb lsb 8 bits msb lsb 0 1b 0 r ack 1b 1 1b 0 1b 0 1b 0 1b 1 preset to 0b0001001 preset to 0b0001001 deviceid() = 0xff manufacturerid() = 0xfe d7 d0 d15 d8 legend s = start condition or repeated start condition ack = acknowledge (logic low) w = write bit (logic low) p = stop condition nack = not acknowledge (logic high) r = read bit (logic high) master to slave slave to master
discontinuous conduction the MAX8713 can also operate in discontinuous-con- duction mode to ensure that the inductor current is always positive. the MAX8713 enters discontinuous- conduction mode when the output of the lvc control point falls below 100mv. for rs = 40m ? , this corre- sponds to 62.5ma. MAX8713 simplified multichemistry smbus battery charger ______________________________________________________________________________________________________ 17 figure 6. smbus write timing smbclk ab cd e fg h i j k smbdata t su:sta t hd:sta t low t high t su:dat t hd:dat t hd:dat t su:sto t buf a = start condition b = msb of address clocked into slave c = lsb of address clocked into slave d = r/w bit clocked into slave e = slave pulls smbdata line low l m f = acknowledge bit clocked into master g = msb of data clocked into slave h = lsb of data clocked into slave i = slave pulls smbdata line low j = acknowledge clocked into master k = acknowledge clock pulse l = stop condition, data executed by slave m = new start condition figure 7. smbus read timing smbclk a = start condition b = msb of address clocked into slave c = lsb of address clocked into slave d = r/w bit clocked into slave ab cd e fg h i j smbdata t su:sta t hd:sta t low t high t su:dat t hd:dat t su:dat t su:sto t buf k e = slave pulls smbdata line low f = acknowledge bit clocked into master g = msb of data clocked into master h = lsb of data clocked into master i = acknowledge clock pulse j = stop condition k = new start condition table 4. battery-charger command summary command command name read/write description por state 0x14 chargecurrent() write only 6-bit charge current setting 0x0000 0x15 chargevoltage() write only 11-bit charge voltage setting 0x0000 0xfe manufacturerid() read only manufacturer id 0x004d 0xff deviceid() read only device id 0x0007
MAX8713 in discontinuous mode, a new cycle is not started until the lvc voltage rises above 100mv. discontinuous- mode operation can occur during conditioning charge of overdischarged battery packs or when the charger is in constant voltage mode as the charge current drops to zero. compensation the charge voltage and charge current-regulation loops are compensated separately and independently at ccv and cci. ccv loop compensation the simplified schematic in figure 9 is sufficient to describe the operation of the MAX8713 when the volt- age loop (ccv) is in control. the required compensa- tion network is a pole-zero pair formed with c cv and r cv . the pole is necessary to roll off the voltage loop? response at low frequency. the zero is necessary to compensate the pole formed by the output capacitor and the load. r esr is the equivalent series resistance (esr) of the charger output capacitor (c out ). r l is the equivalent charger output load, where r l = ? v batt / ? i chg . the equivalent output impedance of the gmv amplifier, r ogmv , is greater than 10m ? . the voltage amplifier transconductance, gmv = 0.125?/mv. the dc-dc converter transconductance is dependent upon the charge current-sense resistor rs: where a csi = 20 and rs = 0.04 ? in the typical applica- tion circuits, so gm out = 1.25a/v. the loop-transfer function is given by: the poles and zeros of the voltage loop-transfer func- tion are listed from lowest frequency to highest frequen- cy in table 5. near crossover, c cv is much lower impedance than r ogmv . since c cv is in parallel with r ogmv, c cv domi- nates the parallel impedance near crossover. additionally r cv is much higher impedance than c cv and dominates the series combination of r cv and c cv , so: c out is also much lower impedance than r l near crossover, so the parallel impedance is mostly capaci- tive and: if r esr is small enough, its associated output zero has a negligible effect near crossover and the loop-transfer function can be simplified as follows: setting ltf = 1 to solve for the unity-gain frequency yields: for stability, choose a crossover frequency less than 1/10 of the switching frequency. for example, choosing a crossover frequency of 25khz and solving for r cv using the component values listed in figure 1 yields: r cv = 10k ? . v batt = 8.4v gmv = 0.125ma/mv i chg = 2a gm out = 1.25a/v c out = 10? f osc = 400khz r l = 0.2 ? f co_cv = 25khz to ensure that the compensation zero adequately can- cels the output pole, select f z_cv f p_out . c cv (r l / r cv ) x c out c cv 200pf (assuming 2 cells and 2a maximum charge current). figure 10 shows the bode plot of the voltage loop fre- quency response using the values calculated above. r cf gmv gm k cv out co_cv out 2 = ? 10 ? fgg r c co_cv out mv cv out m 2 = ltf g r c g = m s out cv out mv r crc l out l out (1+ s ) s ? 1 rcr cr r ogmv cv cv cv ogmv cv (1+ s ) (1+ s ) ? ltf gm r gmv r cr cr cr c r = ? ? ? ? ? ? out l ogmv out esr cv cv cv ogmv out l (1+ s )(1+ s ) (1+ s )(1+ s ) gm s out csi 1 ar = .. arg i 1 20 r dis = = = 05 00 62 5 40 mv s ma ch e current for rs m ? simplified multichemistry smbus battery charger 18 ______________________________________________________________________________________
cci loop compensation the simplified schematic in figure 11 is sufficient to describe the operation of the MAX8713 when the bat- tery current loop (cci) is in control. since the output capacitor? impedance has little effect on the response of the current loop, only a simple single pole is required to compensate this loop. a csi is the internal gain of the current-sense amplifier. rs is the charge current-sense resistor (40m ? ). r ogmi is the equivalent output imped- ance of the gmi amplifier, which is greater than 10m ? . gmi is the charge-current amplifier transconductance = 1?/mv. gm out is the dc-dc converter transcon- ductance = 1.25a/v. the loop-transfer function is given by: which describes a single-pole system. the loop-transfer function simplifies to: the crossover frequency is given by: for stability, choose a crossover frequency lower than 1/10 of the switching frequency. c ci > 10 gmi / (2 f osc ) = 4nf, for a 400khz switch- ing frequency (r freq = 100k ? ). values for c ci greater than ten times the minimum value may slow down the current-loop response. choosing c ci =10nf yields a crossover frequency of 15.9khz. figure 12 shows the bode plot of the current-loop fre- quency response using the values calculated above. mosfet drivers the dhi and dlo outputs are optimized for driving moderate-sized power mosfets. the mosfet drive capability is the same for both the low-side and high- side switches. this is consistent with the variable duty factor that occurs in the notebook computer environ- ment where the battery voltage changes over a wide range. there must be a low-resistance, low-inductance path from the dlo driver to the mosfet gate to pre- vent shoot-through. otherwise, the sense circuitry in the MAX8713 will interpret the mosfet gate as ?ff?while there is still charge left on the gate. use very short, wide traces measuring 10 to 20 squares or less (1.25mm to 2.5mm wide if the mosfet is 25mm from the device). unlike the dlo output, the dhi output uses a 50ns (typ) delay time to prevent the low-side mosfet from turning on until dhi is fully off. the same consider- ations should be used for routing the dhi signal to the high-side mosfet. f gmi c co_ci ci = 2 ltf gmi r sr c = ogmi ogmi ci 1+ since gm ars out csi = 1 , ltf gm a rs gmi r sr c = out csi ogmi ogmi ci 1+ , MAX8713 simplified multichemistry smbus battery charger ______________________________________________________________________________________ 19 figure 8. dc-dc converter block diagram imax ccmp imin zcmp csi 2v 100mv 150mv dcin batt lvc r r q q off-time one-shot off-time compute to dh driver to dl driver figure 9. ccv loop diagram c cv c out r cv r l r esr r ogmv ccv batt gmv ref gm out
MAX8713 the high-side driver (dhi) swings from lx to 5v above lx (bst) and has a typical impedance of 7 ? sourcing and 2 ? sinking. the low-side driver (dlo) swings from dlov to ground and has a typical impedance of 2 ? sinking and 7 ? sourcing. this helps prevent dlo from being pulled up when the high-side switch turns on, due to capacitive coupling from the drain to the gate of the low-side mosfet. this places some restrictions on the mosfets that can be used. using a low-side mosfet with smaller gate-to-drain capacitance can prevent these problems. design procedure mosfet selection choose the n-channel mosfets according to the maxi- mum-required charge current. low-current applications usually require less attention. the high-side mosfet (m1) must be able to dissipate the resistive losses plus the switching losses at both v dcin(min) and v dcin(max) . calculate both of these sums. ideally, the losses at v dcin(min) should be roughly equal to the losses at v dcin(max) , with lower losses in between. if the losses at v dcin(min) are significantly simplified multichemistry smbus battery charger 20 ______________________________________________________________________________________ table 5. ccv loop poles and zeros name equation description ccv pole lowest frequency pole created by c cv and gmv? finite output resistance. since r ogmv is very large and not well controlled, the exact value for the pole frequency is also not well controlled (r ogmv > 10m ? ). ccv zero voltage loop-compensation zero. if this zero is at the same frequency or lower than the output pole f p_out , then the loop-transfer function approximates a single-pole response near the crossover frequency. choose c cv to place this zero at least 1 decade below crossover to ensure adequate phase margin. output pole output pole formed with the effective load resistance (r l ) and the output capacitance (c out ). r l influences the dc gain but does not affect the stability of the system or the crossover frequency. output zero output esr zero. this zero can keep the loop from crossing unity gain if f z_out is less than the desired crossover frequency; therefore, choose a capacitor with an esr zero greater than the crossover frequency. f rc p_cv ogmv cv = 1 2 f rc z_cv cv cv = 1 2 f rc p_out l out = 1 2 f rc z_out esr out = 1 2 frequency (hz) magnitude (db) 100k 10k 1k 100 10 1 -20 0 20 40 60 80 -40 phase (degrees) -90 -45 0 -135 01m magnitude phase figure 10. ccv loop response c ci r ogmi cci gmi csi ictl gm out csip rs2 csin figure 11. cci loop diagram
higher than the losses at v dcin(max) , consider increas- ing the size of m1. conversely, if the losses at v dcin(max) are significantly higher than the losses at v in(min) , consider reducing the size of m1. if dcin does not vary over a wide range, the minimum power dissipation occurs where the resistive losses equal the switching losses. choose a low-side mosfet that has the lowest-possible on-resistance (r ds(on) ), comes in a moderate-sized package (i.e., one or two 8-pin so, dpak, or d 2 pak), and is reasonably priced. make sure that the dlo gate driver can supply sufficient current to support the gate charge and the current injected into the parasitic gate-to-drain capacitor caused by the high-side mosfet turning on; otherwise, cross-con- duction problems can occur. select devices that have short turn-off times, and make sure that m2(t doff(max) ) - m1(t don(min) ) < 30ns, and m1(t doff(max) ) - m2(t don(min) ) < 30ns. failure to do so may result in efficiency-killing shoot-through currents. mosfet power dissipation worst-case conduction losses occur at the duty-factor extremes. for the high-side mosfet, the worst-case power dissipation (pd) due to resistance occurs at the minimum supply voltage: generally, a small high-side mosfet is desired to reduce switching losses at high input voltages. however, the r ds(on) required to stay within package power-dissipation limits often limits how small the mosfet can be. the optimum occurs when the switch- ing (ac) losses equal the conduction (r ds(on) ) losses. switching losses in the high-side mosfet can become an insidious heat problem when maximum ac adapter voltages are applied, due to the squared term in the cv 2 f switching-loss equation. if the high-side mosfet that was chosen for adequate r ds(on) at low supply voltages becomes extraordinarily hot when subjected to v in(max) , then choose a mosfet with lower losses. calculating the power dissipation in m1 due to switch- ing losses is difficult since it must allow for difficult quantifying factors that influence the turn-on and turn- off times. these factors include the internal gate resis- tance, gate charge, threshold voltage, source inductance, and pc board layout characteristics. the following switching-loss calculation provides only a very rough estimate and is no substitute for breadboard evaluation, preferably including a verification using a thermocouple mounted on m1: where c rss is the reverse transfer capacitance of m1, and i gate is the peak gate-drive source/sink current (0.7a sourcing and 2.5a sinking). for the low-side mosfet (m2), the worst-case power dissipation always occurs at maximum input voltage: pd r (low - side) batt dcin load ds(on) - v v i 2 2 = ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 1 pd (hs_switching) dcin(max) rss sw load gate vcfi 2i 2 = pd r (high - side) batt dcin load ds(on) v v i 2 2 = ? ? ? ? ? ? ? ? ? ? ? ? MAX8713 simplified multichemistry smbus battery charger ______________________________________________________________________________________ 21 frequency (hz) magnitude (db) 100k 10k 1k -10 0 10 20 30 40 50 60 -20 phase (degrees) -45 0 -90 100 1m magnitude phase figure 12. cci loop response battery voltage (v) ripple current (a) 10 8 2 4 6 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0 012 v adapter = 12v figure 13. ripple current vs. battery voltage
MAX8713 inductor selection the charge current, ripple, and operating frequency (off-time) determine the inductor characteristics. for optimum efficiency, choose the inductance according to the following equation: l = v batt t off / (0.3 x i chg ) this sets the ripple current to 1/3 of the charge current and results in a good balance between inductor size and efficiency. higher inductor values decrease the ripple current. smaller inductor values require high sat- uration current capabilities and degrade efficiency. inductor l1 must have a saturation current rating of at least the maximum charge current plus 1/2 of the ripple current ( ? il): i sat = i chg + (1/2) ? il the ripple current is determined by: ? il = v batt t off / l where t off = 2.5? (v dcin - v batt ) / v dcin for v batt < 0.88 v dcin , or: t off = 0.3? for v batt > 0.88 v dcin . figure 13 illustrates the variation of the ripple current vs. battery voltage when the circuit is charging at 2a with a fixed input voltage of 19v. input capacitor selection the input capacitor must meet the ripple-current requirement (i rms ) imposed by the switching currents. nontantalum chemistries (ceramic, aluminum, or os-con) are preferred due to their resilience to power- up surge currents. the input capacitors should be sized so that the tem- perature rise due to ripple current in continuous con- duction does not exceed approximately +10 c. the maximum ripple current occurs at 50% duty factor or v dcin = 2 x v batt , which equates to 0.5 x i chg . if the application of interest does not achieve the maximum value, size the input capacitors according to the worst- case conditions. output capacitor selection the output capacitor absorbs the inductor ripple cur- rent and must tolerate the surge current delivered from the battery when it is initially plugged into the charger. as such, both capacitance and esr are important parameters in specifying the output capacitor as a filter and to ensure the stability of the dc-dc co nverter (see the compensation section). beyond the stability require- ments, it is often sufficient to make sure that the output capacitor? esr is simply much lower than the battery? esr. either tantalum or ceramic capacitors can be used on the output. ceramic devices are preferable because of their good voltage ratings and resilience to surge currents. applications information layout and bypassing bypass dcin with a 0.1? ceramic to ground (figure 1). d1 and d2 protect the MAX8713 when the dc power source input is reversed. a signal diode for d2 is adequate because dcin only powers the ldo and the internal reference. bypass v dd , dcin, ldo, dhiv, dlov, src, dac, and ref as shown in figure 1. good pc board layout is required to achieve specified noise immunity, efficiency, and stable performance. the pc board layout artist must be given explicit instructions?referably, a sketch showing the place- ment of the power switching components and high-cur- rent routing. refer to the pc board layout in the MAX8713 evaluation kit for examples. a ground plane is essential for optimum performance. in most applica- tions, the circuit is located on a multilayer board, and full use of the four or more copper layers is recom- mended. use the top layer for high-current connec- tions, the bottom layer for quiet connections, and the inner layers for uninterrupted ground planes. use the following step-by-step guide: 1) place the high-power connections first, with their grounds adjacent: ? minimize the current-sense resistor trace lengths, and ensure accurate current sensing with kelvin connections. ? minimize ground trace lengths in the high-current paths. ? minimize other trace lengths in the high-current paths. ? use >5mm-wide traces in the high-current paths. ? connect c1 and c2 to the high-side mosfet (10mm max length). ? minimize the lx node (mosfets, rectifier cathode, inductor (15mm max length)). keep lx on one side of the pc board to reduce emi radiation. () ii rms chg batt dcin batt dcin vv-v v = ? ? ? ? ? ? ? ? simplified multichemistry smbus battery charger 22 ______________________________________________________________________________________
ideally, surface-mount power components are flush against one another with their ground terminals almost touching. these high-current grounds are then connected to each other with a wide, filled zone of top-layer copper, so they do not go through vias. the resulting top-layer subground plane is connected to the normal inner-layer ground plane at the paddle. other high-current paths should also be minimized, but focusing primarily on short ground and current-sense connections eliminates about 90% of all pc board layout problems. 2) place the ic and signal components. keep the main switching node (lx node) away from sensitive analog components (current-sense traces and ref capacitor). note: the ic must be no further than 10mm from the current-sense resistors. quiet con- nections to ref, vmax, imax, ccv, cci, acin, and dcin should be returned to a separate ground (gnd) island. the appropriate traces are marked on the schematic with the () ground symbol. there is very little current flowing in these traces, so the ground island need not be very large. when placed on an inner layer, a sizable ground island can help simplify the layout because the low-current connec- tions can be made through vias. the ground pad on the backside of the package should also be connected to this quiet ground island. 3) keep the gate-drive traces (dhi and dlo) as short as possible (l < 20mm), and route them away from the current-sense lines and ref. these traces should also be relatively wide (w > 1.25mm). 4) place ceramic bypass capacitors close to the ic. the bulk capacitors can be placed further away. place the current-sense input filter capacitors under the part, connected directly to the gnd pin. 5) use a single-point star ground placed directly below the part at the pgnd pin. connect the power ground (ground plane) and the quiet ground island at this location. chip information transistor count: 8400 process: bicmos MAX8713 simplified multichemistry smbus battery charger ______________________________________________________________________________________ 23
MAX8713 simplified multichemistry smbus battery charger 24 ______________________________________________________________________________________ 24l qfn thin.eps c 1 2 21-0139 package outline 12, 16, 20, 24l thin qfn, 4x4x0.8mm package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)
MAX8713 simplified multichemistry smbus battery charger maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 25 2004 maxim integrated products printed usa is a registered trademark of maxim integrated products. c 2 2 21-0139 package outline 12, 16, 20, 24l thin qfn, 4x4x0.8mm package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)

▲Up To Search▲

Price & Availability of MAX8713

	To Download MAX8713 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .